This design takes a bit every clock cycles and evaluates if the bit source is random. This particular test is the Monobit test from NIST 800.22. The output is given every 65536 cycles. The is_random signal is to be checked only when the valid signal is high.
Provide Clock and input bit.
Non for now. Planning to add soon
send one bit per clock cycle to the epsilon port. check is_random when valid is high. The design evaluates every 65536 bits.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | epsilon | is_random | |
| 1 | valid | ||
| 2 | |||
| 3 | |||
| 4 | |||
| 5 | |||
| 6 | |||
| 7 |